IRF9530NL l advanced process technology l surface mount (irf9530ns) l low-profile through-hole (IRF9530NL) l 175c operating temperature l fast switching l p-channel l fully avalanche rated s d g parameter typ. max. units r q jc junction-to-case CCC 1.9 r q ja junction-to-ambient ( pcb mounted,steady-state)** CCC 40 thermal resistance c/w parameter max. units i d @ t c = 25c continuous drain current, v gs @ -10v ? -14 i d @ t c = 100c continuous drain current, v gs @ -10v ? -10 a i dm pulsed drain current ?? -56 p d @t a = 25c power dissipation 3.8 w p d @t c = 25c power dissipation 79 w linear derating factor 0.53 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy?? 250 mj i ar avalanche current ? -8.4 a e ar repetitive avalanche energy ? 7.9 mj dv/dt peak diode recovery dv/dt ?? -5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c absolute maximum ratings the d 2 pak is a surface mount power package capable of accommodating die sizes up to hex-4. it provides the highest power capability and the lowest possible on- resistance in any existing surface mount package. the d 2 pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0w in a typical surface mount application. the through-hole version (IRF9530NL) is available for low- profile applications. description v dss = -100v r ds(on) = 0.20 w i d = -14a to- 262 2014-8-26 1 www.kersemi.com
IRF9530NL ? starting t j = 25c, l =7.0mh r g = 25 w , i as = -8.4a. (see figure 12) ? repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) notes: ? i sd -8.4a, di/dt -490a/s, v dd v (br)dss , t j 175c ? pulse width 300s; duty cycle 2%. ? uses irf9530n data and test conditions parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode) ?? CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC -1.6 v t j = 25c, i s = -8.4a, v gs = 0v ? t rr reverse recovery time CCC 130 190 ns t j = 25c, i f = -8.4a q rr reverse recovery charge CCC 650 970 nc di/dt = -100a/s ?? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics a s d g parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage -100 CCC CCC v v gs = 0v, i d = -250a d v (br)dss / d t j breakdown voltage temp. coefficient CCC -0.11 CCC v/c reference to 25c, i d = -1ma ? r ds(on) static drain-to-source on-resistance CCC CCC 0.20 w v gs = -10v, i d = -8.4a ? v gs(th) gate threshold voltage -2.0 CCC -4.0 v v ds = v gs , i d = -250a g fs forward transconductance 3.2 CCC CCC s v ds = -50v, i d = -8.4a? CCC CCC -25 a v ds = -100v, v gs = 0v C CC CCC -250 v ds = -80v , v gs = 0v, t j = 150c gate-to-source forward leakage CCC CCC 100 v gs = 20v gate-to-source reverse leakage CCC CCC -100 na v gs = -20v q g total gate charge CCC CCC 58 i d = -8.4a q gs gate-to-source charge CCC CCC 8.3 nc v ds = -80v q gd gate-to-drain ("miller") charge CCC CCC 32 v gs = -10v, see fig. 6 and 13 ?? t d(on) turn-on delay time CCC 15 CCC v dd = -50v t r rise time CCC 58 CCC i d = -8.4a t d(off) turn-off delay time CCC 45 CCC r g = 9.1w t f fall time CCC 46 CCC r d = 6.2 w, see fig. 10 ? between lead, CCC CCC and center of die contact c iss input capacitance CCC 760 CCC v gs = 0v c oss output capacitance CCC 260 CCC pf v ds = -25v c rss reverse transfer capacitance CCC 170 CCC ? = 1.0mhz, see fig. 5 ? electrical characteristics @ t j = 25c (unless otherwise specified) i gss ns i dss drain-to-source leakage current nh 7.5 l s internal source inductance -14 -56 2014-8-26 2 www.kersemi.com
fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 0.1 1 10 100 d ds 2 0s pulse w idth t = 25c c a -i , drain-to-source current (a) - v , drain-to-source voltage (v) vgs top - 15v - 10v - 8.0v - 7.0v - 6.0v - 5.5v - 5.0v bottom - 4.5v - 4.5v 0.1 1 10 100 0.1 1 10 100 d ds a - i , drain-to-source current (a) - v , drain-to-source volta g e ( v ) vgs top - 15v - 10v - 8.0v - 7.0v - 6.0v - 5.5v - 5.0v bottom - 4.5v -4 .5v 20 s p ulse w idth t = 175c c 0.1 1 10 100 456 7891 0 t = 25c j gs d a -i , drain-to-source c urrent (a) - v , gate-to-source voltage (v) v = -50v 20s pulse w idth t = 175c ds j t j = 25c t j = 175c -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d -10v -14a IRF9530NL 2014-8-26 3 www.kersemi.com
fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 400 800 1200 1600 2000 1 10 100 c , capacitance (pf) a ds - v , drain-to-source volta g e ( v ) v = 0v , f = 1mhz c = c + c , c shorte d c = c c = c + c gs i ss gs gd ds rss gd oss ds gd c is s c os s c rs s 0.1 1 10 100 0.4 0.6 0.8 1.0 1.2 1.4 1.6 t = 25c t = 150c j j v = 0v gs sd sd a - i , reverse drain current (a) - v , source-to-drain voltage (v) 0 10 20 30 40 50 60 0 5 10 15 20 q , total gate charge (nc) -v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 -8.4a v = -20v ds v = -50v ds v = -80v ds 1 10 100 1000 1 10 100 1000 operation in this area limited by r ds(on) sin g le pulse t t = 175 c = 25 c j c -v , drain-to-source voltage (v) -i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms IRF9530NL 2014-8-26 4 www.kersemi.com
fig 10a. switching time test circuit fig 10b. switching time waveforms fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature v ds -10v pulse width 1 s duty factor 0.1 % r d v gs v dd r g d.u.t. + - v ds 90% 10% v gs t d(on) t r t d( off) t f 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 t , rectangular pulse duration (sec) 1 th jc d = 0.50 0. 01 0. 02 0. 05 0. 10 0. 20 s in g le p u ls e (thermal response) a t hermal response (z ) p t 2 1 t dm n otes: 1. d uty factor d = t / t 2. peak t = p x z + t 12 j dm thjc c 25 50 75 100 125 150 175 0 2 4 6 8 10 12 14 t , case temperature ( c) -i , drain current (a) c d IRF9530NL 2014-8-26 5 www.kersemi.com
fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current q g q gs q gd v g charge -10v d.u.t . v ds i d i g -3 ma v gs .3 m f 50k w .2 m f 12v cur rent regulator same type as d.u.t. current sampling resistors + - fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v ( br ) dss i as r g i as 0. 01 w t p d. u.t l v ds v dd dr iver a 15v - 20v 25 50 75 100 125 150 175 0 100 200 300 400 500 600 700 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom -3.4a -5.9a -8.4a IRF9530NL 2014-8-26 6 www.kersemi.com
IRF9530NL peak diode recovery dv/dt test circuit p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t . i sd w aveform d.u.t . v ds w aveform inductor curent d = p. w . period + - + + + - - - ? ? ? r g v dd dv/dt controlled by r g i sd controlled by duty factor "d" d.u.t. - device under test d.u.t * circuit layout considerations low stray inductance ground plane low leakage inductance current transformer ? * reverse polarity of d.u.t for p-channel v gs [ ] [ ] *** v gs = 5.0v for logic level and 3v drive devices [ ] *** 2014-8-26 7 www.kersemi.com
d 2 pak package outline d 2 pak part marking information 10 .16 (.400) re f. 6.47 (.255) 6.18 (.243) 2.61 (.103) 2.32 (.091) 8.89 (.350) r e f. - b - 1.32 (.052) 1.22 (.048) 2.79 (.110) 2.29 (.090) 1.39 (.055) 1.14 (.045) 5.28 (.208) 4.78 (.188) 4.69 (.185) 4.20 (.165) 10.54 (.415) 10.29 (.405) - a - 2 1 3 15.49 (.610) 14.73 (.580) 3x 0.93 (.037) 0.69 (.027) 5 .08 (.200) 3x 1.40 (.055) 1.14 (.045) 1.78 (.070) 1.27 (.050) 1.40 (.055) m ax. notes: 1 dimensions after solder dip. 2 dimensioning & tolerancing per ansi y14.5m, 1982. 3 controlling dimension : inch. 4 heatsink & lead dimensions do not include burrs. 0.55 (.022) 0.46 (.018) 0.25 (.010) m b a m m inimum recommended footprint 11.43 (.450) 8.89 (.350) 17.78 (.700) 3.81 (.150) 2.08 (.082) 2x lead assignments 1 - ga te 2 - d r ain 3 - s ou rc e 2.54 (.100) 2x par t number logo date code (yyw w ) yy = year ww = week assembly lot code f530s 9b 1m 9246 a IRF9530NL 2014-8-26 8 www.kersemi.com
package outline to-262 outline to-262 part marking information IRF9530NL 2014-8-26 9 www.kersemi.com
t ape & reel information d 2 pak 3 4 4 tr r feed direction 1. 85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) tr l feed direction 10 .90 (.42 9) 10.70 (.42 1) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957) 23.90 (.941) 0.368 (.0145) 0.342 (.0135) 1.60 (.06 3) 1.50 (.05 9) 13.50 (.532) 12.80 (.504) 330.00 (14.173) max. 27.40 (1.079) 23.90 (.941) 60.00 (2.362) min . 30.40 (1.197) max. 26.40 (1.039) 24.40 (.961) notes : 1. comforms to eia-418. 2. controlling dimension: millimeter. 3. dimension measured @ hub. 4. includes flange distortion @ outer edge. IRF9530NL 2014-8-26 10 www.kersemi.com
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